Nghiên cứu Khoa học
Control CMOS using bulk terminal
Nowadays, CMOS designs are shrinking and getting complex. Chip processes are shrunk below 10nm or even 5nm. Therefore, high supply voltage may cause great damage to components inside chip; especially components that have terminals connecting directly to high supply voltage (VDD). As in modern technology, supply voltage can be reduced to 1 V. With such a small supply voltage, normal CMOS components, like NMOS or PMOS, sometime cannot fully operate in normal conditions. However, CMOS also has one terminal that always be connected to highest supply voltage (VDD) or lowest supply voltage (GND). That terminal is bulk one. We can take advantage that terminal as the forth terminal to control the current under the channel between Source and Drain terminal when CMOS is ON.
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